DE1

DE1

Submitted by james on Tue, 09/26/2017 - 19:06

DE1: Altera Cyclone V SoC (FPGA with dual-core Cortex™-A9) in the DE1-SoC Development Kit. I paid $249.

DE1

T-Bird DE0 to DE1

Submitted by james on Tue, 10/03/2017 - 09:31
Copy Project
Processing > Start > Start analysis and elab
>> Pin Planner
enter LED[7..0] and KEY[1..0] fields
File > Create/Update > Create Top Level Design File
Processing > Start Compilation
? > Programming > Auto Detect
Change file - get the sof (in output directory)
check the "Program/Configure"
hit START

PLEASE reassign QPF, etc to REGULAR not PRO!!!

T-bird Signal on DE1

Submitted by james on Mon, 10/02/2017 - 18:10

 

 

CIRCUIT PICTURE HERE

 

counter32.v

module counter32 ( CLOCK_50, counter_out ); 
input   CLOCK_50;                       
output [31:0] counter_out;
reg    [31:0] counter_out;
always @ (posedge CLOCK_50)
	begin
		counter_out <= #1 counter_out + 1;
	end 
endmodule

lightsequencer.v

module lightsequencer( enable, in3, out3 );
input enable;
input [2:0] in3;
output [2:0] out3;
assign out3[2] = in3[2]    && !enable;
assign out3[1] = &in3[2:1] && !enable;
assign out3[0] = &in3[2:0] && !enable;
endmodule